Microchip Technology MCP6 series Bedienungsanleitung Seite 8

  • Herunterladen
  • Zu meinen Handbüchern hinzufügen
  • Drucken
  • Seite
    / 24
  • Inhaltsverzeichnis
  • LESEZEICHEN
  • Bewertet. / 5. Basierend auf Kundenbewertungen
Seitenansicht 7
AN900
DS00900A-page 8 2004 Microchip Technology Inc.
INITIALIZING THE POWER CONTROL PWM
MODULE AND HARDWARE FAULT INPUTS
The Power Control PWM module simplifies the task of
driving a 3-phase inverter bridge by providing three pairs
of complementary PWM outputs, with dead time inserted
between complimentary channels. It also provides hard-
ware-based Fault inputs that are capable of shutting
down the PWM outputs completely in a Fault situation.
To initialize the PCPWM module:
1. Configure the PCPWM time base:
a) Select a PWM time base postscale value of
1:1.
b) Select a PWM time base prescale value
input of 1:1 (F
OSC/4).
c) Configure the PWM time base for
Free-Running mode (for edge-aligned
operation).
2. Load the PTPERH:PTPERL register pair to
obtain a PWM frequency of 20 kHz. The value to
be used depends on the controller’s clock
frequency; refer to the data sheet to determine
the proper value.
3. Configure the PCPWM output:
a) Enable PWM0 through PWM5 as outputs.
b) Set the PWM I/O pairs (PWM0/1, 2/3 and
4/5) as complementary pairs.
4. Configure the special event trigger:
a) Set the special event trigger postscaler to
1:1.
b) Configure the special event trigger to occur
when the time base is counting upwards.
c) Enable updates from duty cycle and period
buffer registers.
d) Configure for asynchronous overrides from
the OVDCON register.
5. Configure the PCPWM dead time:
a) Select F
OSC/2 as the dead-time prescaler.
b) Load DTCON<5:0> with a dead-time value
to achieve a 2 µs dead time. The actual
value depends on the controller’s clock
frequency; refer to the data sheet to
determine the proper value.
6. Disable the output overrides on the PWM pins
by setting bits POVD<5:0>.
7. Clear the special duty cycle register pair
(SEVTCMPH:SEVTCMPL).
8. Clear all of the regular PWM duty cycle register
pairs (PDCxH:PDCxL) to set the duty cycles to 0.
9. Enable the PWM time base.
10. Enable PWM Fault detection:
a) Enable both Fault A and Fault B.
b) Configure both Fault inputs to disable PWM
channels 0 through 5.
c) Configure both Fault inputs to operate in
Cycle-by-Cycle mode.
INITIALIZING THE HIGH-SPEED ADC
MODULE
Three analog values are measured in this application:
AN0 (DC bus current)
AN1 (potentiometer input for the speed reference)
AN8 (IGBT junction temperature in the inverter
module)
The high-speed ADC incorporates several features,
such as Auto-Conversion mode and a FIFO result
buffer, that reduce the firmware overhead associated
with monitoring multiple analog channels and enhance
ADC throughput.
To initialize the HSADC module:
1. Configure ADC operation:
a) Enable Continuous Loop mode.
b) Enable Multi-Channel mode.
c) Configure auto-conversion sequence to
sample sequentially from Group A and
Group B.
d) Assign V
REF+ and VREF- to AVDD and
AV
SS, respectively.
e) Enable the FIFO buffer.
f) Select the left-justified format for the A/D
result.
g) Set the A/D acquisition time to 12 T
AD
(required for sequential conversion).
h) Set the A/D conversion clock to FOSC/32
i) Turn on the ADC.
2. Configure interrupts and event triggers:
a) Set the A/D interrupt to be generated on
every 2nd and 4th write to the FIFO buffer.
b) Disable external ADC triggers.
3. Configure input group assignments:
a) Assign AN0 to Group A. This will alternate
with AN8 on every FIFO interrupt.
b) Assign AN8 to Group B.
4. Configure RA0, RA1 and RE2 as analog inputs:
a) Set the ANSEL0<1:0> and ANSEL<0> bits.
b) Set the TRISA<1:0> and TRISE<2> bits.
Seitenansicht 7
1 2 3 4 5 6 7 8 9 10 11 12 13 ... 23 24

Kommentare zu diesen Handbüchern

Keine Kommentare